| Engineering
Jobs
___[page1]__[page2]__•[page3]•
Here's
a list of Jobs now available for current applicants.
Responses should be sent to the individual recruiter link
at the bottom of each listing. Be sure to include your name,
the job number/position you are interested in and the method
of contacting you. |
|
| Job
Title |
Job
Description |
|
Job
Title:
Senior Analog Mixed-Signal Design
Location:
Santa Clara, CA
|
As
Senior Analog/Mixed-Signal Design Engineer, you’ll be
responsible for baseband mixed-signal design for Wireless
LAN applications at the transistor level. You'll be responsible
for state-of-the-art linear analog circuit designs including
high speed, high resolution pipelined ADCs, high dynamic range
delta-sigma modulators, tuned-active RC filters, gm-C filters,
oscillators, LVDS receivers, PLL, etc. You'll help with transistor
modeling, board design, and lab characterizations.
Requirements:
• BSEE with 7 years experience, MSEE with 5 years experience,
or Ph.D. with thesis in analog/mixed-signal design and 2 or
more years of design experience required.
• Previous experience designing PLLs, VCOs, Mixers,
Filters, Amplifiers, modulators, A/Ds, D/As, OP AMPs and references
ideal. Must have hands on experience using analog, mixed mode
and RF tools.
• Must have CMOS transistor level design skills.
Please email your resume to Charles Griffin:
c_griffin@technetinc.com
|
| Job
Title |
Job
Description |
|
Job
Title:
Senior Embedded SAN Software Engineer
Location: San Jose, CA
Pay Rate: Open
|
Participate
in the design, and development of embedded real-time software
to implement cutting-edge features on next-generation SAN products.
Work closely with management to identify risk early to minimize
schedule slips. Design and develop protocol, device drivers
and support software for a SAN environment.
Qualifications:
• Five to 10 years of development real-time embedded software
for networking systems is required and must have a proven track
record for delivering assignments on time.
• Pre-existing knowledge in embedded RTOS, current VxWorks,
C, TCP/IP stack or SNMP or other protocol stack, embedded device
driver, etc. Software development experience with 'C' tools
is essential as is working with embedded RTOS such a VxWorks
in SAN environments.
• Hands on experience with TCP/IP stack or other protocol
stacks a must.
• Knowledge of SCSI and RAID is helpful.
• Knowledge of embedded device drivers and integration
with SOC is a plus.
• Network protocol concepts are very crucial.
The candidate must have good documentation, written, and verbal
communication skills. Must be able to operate in a team-oriented
environment and be self-motivated.
Bachelor of Science degree in Computer Science, Engineering
or related discipline required. Master's degree desired.
Please email your resume to Charles Griffin:
c_griffin@technetinc.com |
| Job
Title |
Job
Description |
| Job
Title:
Senior Signal
Integrity Engineer
Duration: 1-3 months
Location:
Santa Clara, CA
Pay Rate: Open
|
This
engineer will work in the Graphics Processor Unit (GPU) hardware
engineering group. He/she will report to the Director of System
Design and be responsible for the design of graphics subsystems
utilizing our chip sets. The members that will be a part of
this new group are outstanding individuals that will need
to handle challenging high speed designs, model generation,
verification and pre/post layout simulation and constraint
management of high speed digital busses. Work as part of a
team with logic, module designers, PCB and component engineers
to characterize packages and define termination strategies.
Primary area of responsibility:
This engineer will be responsible for the design of digital
interfaces connected to the GPU, including the Advanced Graphics
Processor (AGP) bus, Double Data Rate (DDR) memories, TV encoders,
and 1394 phy chips. The design process will include development
of ASIC I/O cells, package substrates, net topologies, termination
schemes, board stackups, power distribution, bypass decoupling,
system timing spreadsheets, and routing documents.
Secondary area of responsibility:
This engineer will work with a Board Design Engineer to power
on, bring up, debug, and validate the new product reference
design, taking responsibility for the design robustness over
temperature, voltage, and frequency.
Requirements:
This engineer should be competent in the field of signal integrity
and high-speed digital design where transmission line environments
are common. Previous design experience in a field which may
include networking, graphics or computer systems is necessary.
Must be proficient with most signal integrity simulation tools
using SpectraQuest, APSIM, HSPICE, and Model validation software
such as IConnect is preferred. A good knowledge of transmission
line analysis, Full-wave 3D analysis techniques such as FDTD
and Method of moments is beneficial. Experience correlating
simulation results with lab measurements using oscilloscopes,
TDRs, VNAs, and spectrum analyzers is a plus.
Education:
BSEE, BSCE and 5 years of experience.
Please email your resume to Charles Griffin:
c_griffin@technetinc.com
|
| Job
Title |
Job
Description |
| Job
Title:
Senior Embedded Software Engineer
Location: San Jose, CA
Pay Rate: Open
|
Participate
in the design, and development of embedded real-time software
to implement cutting-edge features on next-generation SAN products.
Work closely with management to identify risk early to minimize
schedule slips. Design and develop protocol, device drivers
and support software for a SAN environment.
Qualifications:
• Five to 10 years of development real-time embedded software
for networking systems is required and must have a proven track
record for delivering assignments on time.
• Pre-existing knowledge in embedded RTOS, current VxWorks,
C, TCP/IP stack or SNMP or other protocol stack, embedded device
driver, etc. Software development experience with 'C' tools
is essential as is working with embedded RTOS such a VxWorks
in SAN environments.
• Hands on experience with TCP/IP stack or other protocol
stacks a must.
• Knowledge of SCSI and RAID is helpful.
• Knowledge of embedded device drivers and integration
with SOC is a plus.
• Network protocol concepts are very crucial.
The candidate must have good documentation, written, and verbal
communication skills. Must be able to operate in a team-oriented
environment and be self-motivated.
Bachelor of Science degree in Computer Science, Engineering
or related discipline required. Master's degree desired.
Please email you resume to Charles Griffin:
c_griffin@technetinc.com
|
| Job
Title |
Job
Description |
| Job
Title:
Director Software, EDA
Location: Fremont, CA
|
We
are looking for a director to lead the development of all software
at Barcelona. This is primarily focused around the main product
called Prado (GUI, place and route, numerical optimization solver,
database etc.). However, responsibilities also include internal
software applications such as device and circuit modeling tools.
The detailed responsibilities are:
•Product Development and Support. Involves all aspects
of software product design, development, and customer interaction/support
for the product functionality. Also includes design and development
responsibilities for internal device and circuit modeling tools.
Responsibilities include, but are not limited to, key modules
such as numerical optimization (solver), automatic IC analog
router, BDD infrastructure, and interfaces to 3rd party tools
such as Cadence, Mentor, and Avant!.
• Personnel Management. Management of ten to fifteen engineers.
• Education: MS or higher in EE, CS, or Mathematics. Ph.D.
preferred.
• Leadership: Demonstrated skills in effecting change.
Needs to be able to pull together ideas and suggestions from
self and into a vision, and then implement this vision.
• Technical Experience: At least 10 years of experience
in designing and developing large, technically-deep C++ applications,
that were built for commercial/production use. Domain experience
must include an excellent understanding of EDA technologies
such as placement techniques, routing techniques, synthesis,
or IC modeling techniques. Knowledge in theoretical mathematics,
and more specifically, convex or numerical optimization techniques
would be a significant advantage. Lastly, the candidate should
have a strong understanding of digital and analog design methods.
• Problem Solving: Exemplary problem solving and decision-making
skills are also going to be required. Needs to know which questions
need to be asked and demonstrate strong judgment with little
direction from others.
• Personnel Management: At least 4 years experience in
personnel management. Must be capable of attracting, growing,
and managing a high caliber engineering team.
• Personal skills:
Candidate must display the following qualities:
1. Excellent communicator.
2. Motivated by excellence, especially in the area of execution.
3. Team player who is willing and capable of successfully leveraging
his/her peers.
4. Strong interest in learning and growing. Enjoys working in
a dynamic environment.
The ideal candidate would be a manager or product architect
who has developed algorithmically challenging EDA products such
as placement, routers, synthesis, or IC modeling.
Contact:
TomMahoney@technetinc.com |
| Job
Title |
Job
Description |
|
Job
Title:
Senior Analog
Design Engineer
Location: Fremont, CA
Pay Rate: DOE
|
We
are looking for a Senior Engineer to develop high-performance
analog building blocks and mixed-mode sub-systems in deep sub-micron
CMOS processes.
MS or Ph.D. in EECS, with at least 5 years of experience in
the design of high-performance analog circuits. Experience in
any of the following: ADCs, DACs, PLLs, SC & Continuous
time filters is required, accompanied with a strong theoretical
analog design background. Some knowledge of C or C++ and Verilog-A
languages is really appreciated. Autonomy and product oriented
attitude is expected for this profile.
Contact:
TomMahoney@technetinc.com
|
|
|
 |
